The 3-nanometer process is followed by the 2-nanometer process: Work on the next ARM SoC generation has begun at Taiwan Semiconductor Manufacturing Co Ltd (TSMC). Trial production of the first units is starting, reports South Korean electronics trade journal ET News, citing local media At a factory in Baoshan. In fact, observers expected this would not happen before October.
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Intended for iPhone 17
The new SoCs should be initially for Apple. According to ET News, mass production is planned for next year. TSMC installed the necessary machines in the second quarter. The market actually expected that pilot production would start only in the fourth quarter, but now the situation has changed to the third quarter. The new 2nm process was first presented to Apple and other customers last year. In addition to more transistors and higher overall system performance, it should also bring lower power consumption.
If mass-produced next year, the SoC in the “A19” SoC could be used for the iPhone 17, which is expected to be released in late 2025. According to analysts, Apple is said to have achieved initial total capacity. This usually means that the company first uses a new SoC in the iPhone and then adapts it in iPads and Macs. However, this year things went the other way around: the iPad Pro M4 was the first to receive the new generation of chips as a tablet. Next will be the iPhone 16 (as “A18”) and the first Macs (possibly in autumn).
No protest revolution planned
Until recently, the performance gains when switching to the new manufacturing process were relatively moderate. This is because the feature width reduction only affects transistors, but not other parts of the SoC. However, thanks to its intense collaboration with TSMC – considered Apple’s best customer – the iPhone maker is always able to reach new improvements. In addition, the company also has its own chip design.
As part of the trial production at TSMC, it must now be determined how high the reject rate is. Calibrating the production technology should ensure that the yield is high enough. There were difficulties with the 3nm process at the beginning and TSMC had to write off a little less than 50 percent of the chips.
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TSMC’s stated goal is to launch the 2 nm N2 process in 2025. This does not require a new lithography system, as the switch to high-NA-EUV has not yet been made.
(B.Sc.)
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